1. Field of the Invention
The present invention relates to an additive composition, a slurry composition including the additive composition, and a method of polishing an object using the slurry composition. More particularly, the present invention relates to an additive composition including a salt of a polymer acid, a slurry composition including the additive composition, and chemical mechanical polishing of an object using the slurry composition.
2. Description of the Related Art
As information media such as computers have seen widespread use, semiconductor device technologies have rapidly progressed. From a functional aspect, semiconductor devices should exhibit rapid operating speeds, large capacities, and high degrees of integration. To this end, manufacturing techniques have been developed to improve device performance and characteristics.
One such technique is chemical mechanical polishing (CMP), which was been developed in the 1980s. In CMP, a surface portion of a layer formed on a substrate is planarized through polishing. This technique is used, for example, when fabricating an shallow trench isolation (STI) structure.
U.S. Pat. No. 6,165,052 issued to Yu et al. discloses a method of fabricating an STI structure by applying CMP techniques.
FIGS. 1A-1E are sectional views for explaining a method of manufacturing an STI structure using the conventional polishing method.
Referring to FIG. 1A, a trench 12 is formed at the upper portion of a substrate 10 that is comprised of silicon. The trench 12 is formed via a photolithography process by using photoresist patterns as an etching mask.
Referring to FIG. 1B, a polish stop layer 14 is formed on the trench 12 and the substrate 10. Usually, the polish stop layer 14 is a silicon nitride layer that is comprised of a silicon nitride material. The polish stop layer 14 is formed by a chemical vapor deposition method.
Referring to FIG. 1C, a silicon oxide layer 16 is formed of silicon oxide material on the polish stop layer 14 so as to fill and bury the trench 12.
Referring to FIG. 1D, the silicon oxide layer 16 is polished to expose the polish stop layer 14a formed under the silicon oxide layer 16 and on the substrate 10, but not on the trench 12. Accordingly, silicon oxide material 16a remains only in the recessed portion of the trench 12.
Referring to FIG. 1E, the exposed polish stopping layer 14a is etched to expose the surface portion of the substrate 10. As the result, an STI structure 16b is formed on the substrate 10.
In CMP, an over-polishing technique is adopted for polishing a portion of the silicon nitride layer. The over-polishing utilizes the difference in polishing rates (i.e., removal rates) between the silicon oxide layer and the silicon nitride layer. The polishing rate of the silicon oxide layer is controlled to be faster than that of the silicon nitride layer. Through over-polishing, the silicon oxide layer formed on the silicon nitride layer can be completely polished.
The difference in the polishing rate between the two layers is controlled by a slurry composition used during polishing. Generally, an oxide based slurry composition including silica as polishing particles is used for the over-polishing. When this slurry composition is used for the over-polishing process, the polishing rate of the silicon oxide layer is 4-5 faster times than that of the silicon nitride layer.
FIG. 2 is a sectional view for explaining a dishing phenomenon generated during manufacturing of an STI structure by the conventional polishing method. This state is obtained after completing the over-polishing using the oxide based slurry composition. The silicon nitride layer 22 on the substrate 20 is exposed and the silicon oxide layer 24 remains only within the recessed portion of the trench.
However, after completing the over-polishing, a dishing feature is generated around the mouth portion of the trench A. This dishing phenomenon occurs when the silicon oxide layer filled within the mouth portion of the trench A is polished. In addition, erosion occurs between the neighboring trench portions B through an over-polishing of the silicon nitride layer formed at the portion between the trench portions B. In particular, at the regions where the trench patterns are formed minutely, more severe dishing and erosion features are generated.
Dishing and erosion is generated from low polishing selectivity, which is the ratio of the polishing rate of the silicon oxide layer to the polishing rate of the silicon nitride layer. The resultant non-planar surface features are factors which can result in defects when implementing subsequent processes.
To overcome low polishing selectivity, it has been suggested to form a relatively thick silicon nitride layer to minimize dishing and erosion. However, this technique is not appropriate for the manufacture of more recently developed semiconductor devices having multi-layer structures.
As a result, slurry compositions which result in even faster polishing rates of the silicon oxide layer relative to that of the silicon nitride layer have been developed. These kinds of slurry compositions are disclosed in U.S. Pat. No. 5,614,444 issued to Farkas et al., Japanese Laid-Open Patent Publication Nos. Hei 1998-106988, Hei 1998-154672, Hei 1998-270401, Hei 2001-31951, Hei 2001-35820 and Hei 2001-319900 and Korean Laid-Open Patent Publication No. 2001-108048.
Particularly, U.S. Pat. No. 6,114,249 issued to Canaperi et al. discloses a slurry composition having a silicon oxide layer polishing rate which is about 28 times faster than that of a silicon nitride layer.
U.S. Pat. No. 5,938,505 issued to Morrison et al. also discloses a slurry composition in which a polishing rate of a silicon oxide layer can be controlled to about 30 times faster than that of a silicon nitride layer.
Korean Laid-Open Patent Publication No. 2001-108048 discloses a slurry composition including a cerium oxide slurry, a dispersing agent as an additive and water in order to control a polishing rate of a silicon oxide layer to about 50 times faster than that of a silicon nitride layer.
As described above, various methods concerning the development of the slurry composition have been reported to improve a polishing selectivity. However, for the manufacture of the more recent semiconductor devices requiring a design rule of 0.13 μm or less, a slurry composition exhibiting an even higher polishing selectivity is required.